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100 Words Every Embedded Systems Engineer Should Know

July 15, 2026

100 Words Every Embedded Systems Engineer Should Know

No. Item Definition
1. acknowledge signal confirming receipt or action
2. actuator device producing physical action
3. ADC converts analog signals to digital
4. address location identifier in memory
5. aliasing false frequencies from undersampling
6. analog continuously varying signal form
7. bandwidth data-carrying capacity of a channel
8. bare-metal running without an operating system
9. baud symbol rate of communication
10. bitmask pattern used to select bits
11. bootloader program that starts system software
12. brownout low-voltage condition causing malfunction
13. buffer temporary data storage area
14. bus shared path for data transfer
15. calibration adjusting for accurate measurement
16. capacitor component that stores electric charge
17. checksum simple value for error detection
18. clock timing signal for digital circuits
19. configuration chosen settings for operation
20. context switch saving and restoring task state
21. CRC cyclic redundancy check code
22. current flow of electric charge
23. DAC converts digital signals to analog
24. deadlock tasks waiting forever on resources
25. debounce filter unwanted switch transitions
26. debugger tool for finding program faults
27. digital discrete signal form using levels
28. diode component allowing one-way current
29. DMA direct memory access transfer
30. duty cycle on-time fraction of a period
31. edge signal transition between logic levels
32. EEPROM electrically erasable nonvolatile memory
33. emulator system imitating another system
34. endianness byte order in multi-byte data
35. exception special event altering normal flow
36. falling edge high-to-low signal transition
37. filter circuit or code shaping signals
38. firmware software stored on hardware devices
39. flash rewritable nonvolatile memory type
40. footprint amount of memory or board space
41. frame structured block of communication data
42. frequency cycles occurring per second
43. GPIO general-purpose digital input or output
44. ground common electrical reference point
45. handshake coordination before data transfer
46. hard fault serious processor exception condition
47. heap memory used for dynamic allocation
48. hysteresis output depends on previous input
49. I2C two-wire serial communication bus
50. initialization setting initial values and state
51. instruction basic operation executed by processor
52. interrupt signal that pauses normal execution
53. ISR interrupt service routine
54. jitter variation in signal timing
55. JTAG hardware interface for testing and debug
56. latency delay before a response occurs
57. linker tool combining object files
58. logic analyzer tool capturing digital signals
59. microcontroller small computer on a single chip
60. MOSFET voltage-controlled transistor type
61. mutex lock for exclusive resource access
62. noise unwanted electrical disturbance
63. optimization improving speed, size, or efficiency
64. oscilloscope tool displaying electrical waveforms
65. overflow value exceeding storage capacity
66. packet formatted unit of transmitted data
67. pointer variable holding a memory address
68. polling repeatedly checking device status
69. power rail voltage supply line on hardware
70. preemption interrupting a task to run another
71. priority importance level for task scheduling
72. protocol rules for data exchange
73. PWM varying pulse width for control
74. race condition timing-dependent shared-state bug
75. RAM volatile read-write working memory
76. real-time requiring response within strict timing
77. register small fast storage in a CPU
78. reset returning system to initial state
79. resistor component that limits current flow
80. ROM nonvolatile read-only memory
81. RTOS real-time operating system
82. sampling measuring a signal at intervals
83. scheduler component that decides task execution
84. semaphore counter-based synchronization primitive
85. sensor device measuring physical conditions
86. signal electrical representation of information
87. SPI synchronous serial communication bus
88. stack memory for calls and locals
89. startup initialization phase after power-on
90. threshold level that triggers a change
91. throughput amount processed in a given time
92. tick regular timer event for scheduling
93. timeout maximum allowed waiting time
94. trace record of execution events
95. transistor semiconductor switch or amplifier
96. UART serial communication hardware interface
97. volatile subject to unexpected external change
98. voltage electrical potential difference
99. wake-up return from low-power state
100. watchdog timer that resets stalled systems
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